Stream: t-lang/wg-unsafe-code-guidelines

Topic: Misoptimization due to Rust/HW memory model mismatch

RalfJ (Jun 29 2019 at 10:04, on Zulip):

Does anyone know an example demonstrating that reasoning based on the hardware concurrency memory model when writing Rust does not work? Basically something like this but for concurrency and in Rust. ;)
I've been thinking maybe one could use Relaxed where one should use Release/Acquire -- on x86 that compiles the same, so "what the hardware does" would work, but if we can get LLVM to reorder an access across the Relaxed that it would not be allowed to reorder across the Release/Acquire, that would demonstrate that "what the hardware does" just does not matter.

RalfJ (Jun 29 2019 at 10:08, on Zulip):

Here's a program exhibitng UB this way, but I dont know how to make LLVM optimize it the bad way:

Last update: May 26 2020 at 13:05UTC